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Quazar SID Interface

SID Programming

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Memory Addresses of the SID

Reg Function
0 frequency voice 1 low byte
1 frequency voice 1 high byte
2 pulse wave duty cycle voice 1 low byte
  7..4 3..0
3 — pulse wave duty cycle voice 1 high byte
4 control register voice 1
  7 6 5 4 3 2 1 0
  noise pulse sawtooth triangle test ring modulation with voice 3 synchronize with voice 3 gate
  7..4 3..0
5 attack duration decay duration voice 1
6 sustain level release duration
7 frequency voice 2 low byte
8 frequency voice 2 high byte
9 pulse wave duty cycle voice 2 low byte
  7..4 3..0
10 — pulse wave duty cycle voice 2 high byte
11 control register voice 2
  7 6 5 4 3 2 1 0
  noise pulse sawtooth triangle test ring modulation with voice 1 synchronize with voice 1 gate
  7..4 3..0
12 attack duration decay duration voice 2
13 sustain level release duration voice 2
14 frequency voice 3 low byte
15 frequency voice 3 high byte
16 pulse wave duty cycle voice 3 low byte
  7..4 3..0
17 — pulse wave duty cycle voice 3 high byte
18 control register voice 3
  7 6 5 4 3 2 1 0
  noise pulse sawtooth triangle test ring modulation with voice 2 synchronize with voice 2 gate
  7..4 3..0
19 attack duration decay duration voice 3
20 sustain level release duration voice 3
21 — filter cutoff frequency low byte
22 filter cutoff frequency high byte
23 filter resonance and routing
  7..4 3 2 1 0
  filter resonance external input voice 3 voice 2 voice 1
24 filter mode and main volume control
  7 6 5 4 3..0
  mute voice 3 high pass band pass low pass main volume
25 paddle x value (read only) - not available
26 paddle y value (read only) - not available
27 oscillator voice 3 (read only) - not available
28 envelope voice 3 (read only) - not available

Envelope rates

Value
Attack Rate
Release Rate
DEC(Time/Cycle)(Time/Cycle)
02 mS6 mS
18 mS24 mS
216 mS48 mS
324 mS72 mS
438 mS114 mS
556 mS168 mS
668 mS204 mS
780 mS240 mS
8100 mS300 mS
9250 mS750 mS
10500 mS1.5 S
11800 mS2.4 S
121 S3 S
133 S9 S
145 S15 S
158 S24 S

Using with RC2014 Mini II Picasso

rc2014-sid-picasso.jpg

Limitations

  • Interrupt timer won't work since first half of memory is ROM and can't install interrupt handler. This will work with CP/M cards where all memory space is backed by RAM.
  • It is not possible to read data from SID chip. Paddled and voice 3 data and ADSR registers cannot be read.

Basic

Set ROM address to 0 100 (just Bank 2 set) to boot into Microsoft BASIC (Phil Green).

Insert SID interface card: marked A15 pin is pin 1.

Use the following test BASIC program (as provided in the instructions):

10 DATA 205,7,10,123,66,14,84,237,121
20 DATA 0,0,0,203,248,237,121,195,125,17
30 FOR A=-1024 TO -1006
40 READ D
50 POKE A,D
60 NEXT A
70 POKE -32695,0
80 POKE -32694,252
90 LET A=USR(1024)
100 LET A=USR(6159)
101 LET A=USR(1280)
102 LET A=USR(1776)
103 LET A=USR(1041)
110 FOR D=256 TO 511
120 LET A=USR(D)
130 NEXT D
140 GOTO 110

Type RUN to start it. You should hear "siren" audio effect.

CamelForth

Set ROM address to 0 001 (just Bank 8 set) to boot into CamelForth (Justin Skists).

Paste following Forth program.

: PC2! SWAP >< OR PC! ; 
: SIDSEND 2DUP 128 OR 84 PC2! 2DUP 127 AND 84 PC2! 128 OR 84 PC2! ;
: SIDRST 0 24 SIDSEND 0 4 SIDSEND ;
: SIDTEST 15 24 SIDSEND  10 0 DO 255 0 DO I 1 SIDSEND LOOP LOOP 0 24 SIDSEND ;

SIDRST 
15 24 SIDSEND 
0 5 SIDSEND 
240 6 SIDSEND 
17 4 SIDSEND 
SIDTEST
PS2!     c c p-addr --   Data byte (A), high address byte (B), port address (C) - OUT to port with A and B registers set
SIDSEND  c c --          Data value, register (0-31); bits 5,6 are for interrupt settings; bit 7 (/CS) is handled
SIDRST   --              Reset SID chip

Decimals used:

  • 84 = 0x52 - I/O port number
  • 24 = 0x18  register 0x18 (24), no interrupt
  • 128 - high bit set
  • 127 - all but high bit set
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